53(1)Design(5)ModifySpecification model (NDL)Device model (NDL)(2)GenerateConfiguration fileConfiguration fileConfiguration fileProposed flow of Network Lifecycle Management.A Cache Replacement Policy with Considering Fluctuation Patterns of Total Priority ValueImplementation of a domain-specific RISC-V processor using FPGA boardManager (Designer)(4)Detect abnormalcompareSnapshot (NDL)Device model (NDL)Device model (NDL)Network sensorNetwork DeviceNetwork DeviceNetwork Device(3)GenerateYamagata University Graduate School of Science and Engineering Research Interest：Computer NetworksYamagata University Graduate School of Science and Engineering Research InterestE-mail ：takeda@yz.yamagata-u.ac.jpComputer NetworksTel ：+81-238-26-3349Fax：+81-238-26-3349NetworkContentContent：Toreduceadministrativecost,weproposedNetworkDescriptionLanguage(NDL)forNetworkLifecycle(design,configurationandmonitoring)Management.TheadministratoronlywritesNetworkSpecificationbyNDL,configurationfilesforindividualNetworkDevicesautomaticallygeneratedfromSpecification.NDLisXML(ExtensibleMarkupLanguage)basedLanguage.Ithavefourelements,NetworkNode,Agent,Link,Flow,anddescribethreemodels,Specificationmodel,DevicemodelandSnapshot.ThisFigureshowstheproposedflowofNetworkLifecycleManagement.We(1)CreateNetworkSpecificationmodel,(2)GenerateConfigurationfilesautomaticallyfromSpecificationmodelandapplyittoindividualdevices,byusingXSL(ExtensibleStylesheetLanguage),(3)GeneratesnapshotrepresentingthecurrentstateofnetworkbyNetworkSensor,(4)Detectunknowndevicesand/orflowsbyComparisonofSpecificationmodelandSnapshot.Dosomethingiftheseareillegaldevicesand/orflows,(5)ModifySpecification(i.e.addnewdevicesand/orflows)ifthereareregaldevicesand/orflows. To reduce administrative cost, we proposed Network Description Language (NDL) for Network Lifecycle (design, configuration and monitoring) Management. The administrator only writes Network Specification by NDL, configuration files for individual Network Devices automatically generated from Specification. NDL is XML (Extensible Markup Language) based Language. It have four elements, Network Node, Agent, Link, Flow, and describe three models, Specification model, Device model and Snapshot. This Figure shows the proposed flow of Network Lifecycle Management. We explain as follows, (1) Create Network Specification model, (2) Generate Configuration files automatically from Specification model and apply it to individual devices, by using XSL (Extensible Stylesheet Language), (3) Generate snapshot representing the current state of network by Network Sensor, (4) Detect unknown devices and/or flows by Comparison of Specification model and Snapshot. Do something if these are illegal devices and/or flows, (5) Modify Specification (i.e. add new devices and/or flows) if there are regal devices and/or flows. explainasfollows,Content：ContentIn recent years, computers are required to execute various fields of applications at high speed with low energy consumption. In addition, In recent years, computers are required to execute various fields of applications at high speed with low energy consumption. In new devices are emerging one after another, such as three-addition, new devices are emerging one after another, such as dimensional integrated circuit stacking technology and FPGAs, so it three-dimensional integrated circuit stacking technology and is necessary to consider architectures that maximize the capabilities FPGAs, so it is necessary to consider architectures that maximize of these devices. On the other hand, computer performance relies the capabilities of these devices. On the other hand, computer heavily on components such as an arithmetic unit and a cache performance relies heavily on components such as an arithmetic memory. Speeding up and reducing power consumption of these unit and a cache memory. Speeding up and reducing power components achieve a higher performance of computers.consumption of these components achieve a higher performance of computers.Tada lab is developing a domain-specific RISC-V processor suitable Tada lab is developing a domain-specific RISC-V processor for executing specific applications such as artificial intelligence and suitable for executing specific applications such as artificial data science. We are also conducting research on replacement intelligence and data science. We are also conducting research on algorithms to improve the performance of cache memory, and replacement algorithms to improve the performance of cache research on high performance and energy saving of processors using memory, and research on high performance and energy saving of new semiconductor technologies such as 3DIC stacking technology.processors using new semiconductor technologies such as 3DIC Appealing point：stacking technology.Tada Lab is conducting research on computer architecture from Special objectivesboth hardware and software sides. In recent years, we have been focusing on research on domain-specific RISC-V processors. Tada Lab is conducting research on computer architecture from both hardware and software sides. In recent years, we have Yamagata UniversityGraduate School of Science and Engineering been focusing on research on domain-specific RISC-V processors.Research Interest ：Computer ArchitectureYamagata University Graduate School of Science and Engineering E-mail ：jubee@yz.yamagata-u.ac.jpResearch InterestTel ：+81-238-26-3576Computer ArchitectureE-mail ・ takeda@yz.yamagata-u.ac.jpTel ・ +81-238-26-3349Fax ・ +81-238-26-3349E-mail ・ jubee@yz.yamagata-u.ac.jpHP ：http://yudb.kj.yamagata-u.ac.jp/html/487_ja.htmlTel ・ +81-238-26-3576HP・http://yudb.kj.yamagata-u.ac.jp/html/487_ja.htmlLow-Power High-Performance Computer ArchitectureLow-Power High-Performance Computer ArchitectureAssistant ProfessorToshihiro TaketaAssistant Professor JubeeTada Development of Network Description LanguageDevelopment of Network Description Language Assistant Professor Toshihiro TaketaAssistant Professor Jubee Tada
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